The number of image forming apparatuses employing a flash memory as a storage medium is in the increase. A flash memory is used for various purposes in image forming apparatuses. For example, a flash memory is used not only for storing programs, but also used as a buffer memory for buffering image data. In other words, a flash memory is also used for a purpose which causes the flash memory to frequently rewrite data in itself. On the other hand, due to miniaturization of semiconductor process rule (process size), the maximum number of times of rewriting data in a flash memory and a data retention period of a flash memory tend to decrease. Generally, when a flash memory has reached its usable life span (spare sectors have been exhausted), in many cases, the flash memory becomes a state of read-only (inhibition of rewriting). Under such a situation, it becomes difficult for an image forming apparatus using such a flash memory, to respond to a user's request.
In view of the situation, as some sort of flash memory, there has been provided a memory device capable of switching its data recording mode between a mode of recording data such that each memory cell stores multi-valued data (such a cell is referred to as a MLC or multi-level cell) and a mode of recording data such that each memory cell store binary data (such a cell is referred to as a SLC or single-level cell). The mode of recording multi-valued data allows a flash memory to record a large amount of data, and the mode of recording binary data increases the number of times that data can be written to a flash memory and prolongs a data retention period of a flash memory.
With regard to such a device, for example, Japanese Unexamined Patent Publication (JP-A) No. 2009-48680 discloses a storage device which includes one or more non-volatile semiconductor memories each including a memory array, and a controller. The memory array includes multiple memory cells in each of which multiple thresholds at respective voltage levels are established so that two or more bits of data can be stored. The controller is configured to give operation instructions to the non-volatile semiconductor memory on the basis of a command issued by an external device. The non-volatile semiconductor memory includes a block administering table which contains binary/multi-valued data writing information, where the binary/multi-valued data writing information indicates whether to store data as binary data or multi-valued data at the time of writing the data into the non-volatile semiconductor memory. The controller writes data into the non-volatile semiconductor memory while referring to the binary/multi-valued data writing information in the block administering table.
Further, JP-A No. 2009-64394 discloses an access control apparatus which is connected to an external device, a first memory for storing data to be accessed by the external device, and a second memory for storing the data, where the second memory is greater in the number of rewritable times of the data than that of the first memory. The access control apparatus includes a table storing section to store a conversion table, a judging section, a moving section, and a table updating section. In the conversion table, an external address, an internal address, and the number of rewriting times of the data are correlated with each other, where the external address is designated so that the external device can access the data, and the internal address indicates one of a location where the data is stored in the first memory and a location where the data is stored in the second memory. The judging section judges whether the internal address correlated with the external address designated as a location to which data is to be written, is the internal address in the first memory. In the case where the internal address is the internal address in the first memory, the judging section judges whether the number of rewriting times correlated with the internal address exceeds a prescribed first threshold. The moving section moves the data stored at the internal address in the first memory, at which the number of rewriting times has exceeded the first threshold, to the internal address of the second memory. The table updating section updates the conversion table by replacing the internal address correlated with the external address of the moved data, with the internal address of a moving destination.
According to the technique of the above-mentioned JP-A No. 2009-48680, a memory controller counts up and administrates the number of times of data writing, and when the number of times of data writing in a certain block becomes equal to or more than a prescribed value, the memory controller records the data in a region where data is stored as binary data. Recording high frequently written data as binary data allows the storage device to secure the reliability of stored data. The technique of JP-A No. 2009-48680 is directed to a storage device, and even if the way to record data is changed according to the number of times of data writing, it could not cause any problem in the storage device itself. However, in the case of an apparatus which executes processing by using data stored in a flash memory, an amount of data written into the flash memory changes according to an operating state of the apparatus. Therefore, the change of the way to record data reduces the available capacity of the flash memory, and such a change can cause a trouble in operation of the apparatus.
Further, as disclosed in JP-A No. 2009-64394, the disclosed technique uses plural kinds of device, such as a MLC, a SLC, and a FeRAM (Ferroelectric Random Access Memory), disposed in an apparatus, and prolongs the data retention period by moving data recorded at the internal address at which the number of times of data writing exceeds a threshold, to the internal address of SLC or FeRAM exhibiting the maximum number of times of data rewriting which is relatively great. However, since this technique needs a preparation of plural kinds of device, such as MLC, SLC, and FeRAM, it makes the constitution of the apparatus complicated and increases the cost
Further, this technique needs, at the time of reading data recorded as multi-valued data, a process to convert the multi-valued data into binary data. Such a process may lower the performance of a function of the apparatus which operates by using data recorded as multi-valued data.
In this way, it is desirable to record data as multi-valued data in order to record a large amount of data, and is desirable to record data as binary data in order to enhance the reliability of recorded data and the performance of a function of an apparatus using the recorded data. However, the conventional method hardly satisfied the both demands, which was a problem. The present invention seeks to solve the problem.